View FDC6321C_1375841.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

april 1999 f dc6 321c dual n & p c hannel , digital fet general description features absolute maximum ratings t a = 25 o c unless other wise noted symbol parameter n-channel p-channel units v dss , v cc drain-source voltage, power supply voltage 25 -25 v v gss , v in gate-source voltage , 8 -8 v i d , i o drain/output current - continuous 0.68 -0.46 a - pulsed 2 -1.5 p d maximum power dissipation ( note 1a ) (note 1b ) 0.9 w 0.7 t j ,t stg operating and storage temp ature range r -55 to 150 c esd electrostatic discharge rating mil-std-883d human body model (100pf / 1500 ohm) 6 kv thermal characteristics r q ja thermal resistance, junction-to-ambient (note 1a ) 140 c/w r q jc thermal resistance, junction-to-case (note 1) 60 c/w FDC6321C .revb n-ch 25 v, 0.68 a, r ds(on) = 0.45 w @ v gs = 4.5 v p -ch -25 v, -0.46 a , r ds(on) = 1.1 w @ v gs = -4.5 v. very low level gate drive requirements allowing direct operation in 3 v circuits. v gs(th) < 1.0v. gate-source zener for esd ruggedness . >6 kv human body model replace multiple dual npn & pnp digital transistors . these dual n & p c hannel logic level enhancement mode field effect transistors are produced using fairchild 's proprietary, high cell density, dmos technology. this very high density process is especially tailored to minimize on-state resistance. this device has been designed especially for low voltage applications as a replacement for digital transistors in load switching applications. since bias resistors are not required this dual digital fet can replace several digital transistors with different bias resistors. sot-23 supersot t m -8 soic-16 so-8 sot-223 supersot t m -6 mark:.321 1 5 3 2 6 4 d1 s2 g1 d2 s1 g2 supersot -6 tm ? 1999 fairchild semiconductor corporation
electrical characteristics (t a = 25 o c unless otherwise noted ) symbol parameter conditions type min typ max units off characteristics bv dss drain-source breakdown voltage v gs = 0 v, i d = 250 a n-ch 25 v v gs = 0 v, i d = -250 a p-ch -25 d bv dss / d t j breakdown voltage temp. coefficient i d = 250 a , referenced to 25 o c n-ch 26 mv / o c i d = -250 a , referenced to 25 o c p-ch -22 i dss zero gate voltage drain current v ds = 20 v, v gs = 0 v, n-ch 1 a t j = 5 5c 10 i dss zero gate voltage drain current v ds =-20 v, v gs = 0 v , p-ch -1 a t j = 5 5c -10 i gss gate - body leakage current v gs = 8 v, v ds = 0 v n-ch 100 na v gs = - 8 v, v ds = 0 v p-ch -100 na on characteristics (note 2) d v gs(th) / d t j gate threshold voltage temp. coefficient i d = 250 a , referenced to 25 o c n-ch -2.6 mv / o c i d = -250 a , referenced to 25 o c p-ch 2.1 v gs (th) gate threshold voltage v ds = v gs , i d = 250 a n-ch 0.65 0.8 1.5 v v ds = v gs , i d = -250 a p-ch -0.65 -0.86 -1.5 r ds(on) static drain-source on-resistance v gs = 4.5 v, i d = 0.5 a n-ch 0.33 0.45 w t j =12 5c 0.51 0.72 v gs = 2.7 v, i d = 0.2 5a 0.44 0.6 v gs = -4.5 v, i d = -0.5 a p-ch 0.87 1.1 t j =12 5c 1.21 1.8 v gs = -2.7 v, i d = -0.25 a 1.22 1.5 i d(on) on-state drain current v gs = 4.5 v, v ds = 5 v n-ch 1 a v gs = -4.5 v, v ds = -5 v p-ch -1 g fs forward transconductance v ds = 5 v, i d = 0.5 a n-ch 1.45 s v ds = -5 v, i d = -0.5 a p-ch 0.8 dynamic characteristics c iss input capacitance n-channel n-ch 50 pf v ds = 10 v, v gs = 0 v, p-ch 63 c oss output capacitance f = 1.0 mhz n-ch 28 pf p-channel p-ch 34 c rss reverse transfer capacitance v ds = -10 v, v gs = 0v, n-ch 9 pf f = 1.0 mhz p-ch 10 FDC6321C .revb
electrical characteristics (t a = 25 o c unless otherwise noted ) switching ch aracteristics (note 2 ) symbol parameter conditions type min typ max units t d(on ) turn - on delay time n-channel n-ch 3 6 ns v dd = 6 v, i d = 0.5 a, p-ch 7 20 t r turn - on rise time v gs = 4.5 v, r gen = 50 w n-ch 8 16 ns p-ch 9 18 t d(off) turn - off delay time p-channel n-ch 17 30 ns v dd = -6 v, i d = -0.5 a, p-ch 55 110 t f turn - off fall time v gen = -4.5 v, r gen = 50 w n-ch 13 25 ns p-ch 35 70 q g total gate charge n-channel n-ch 1.64 2.3 nc v ds = 5 v, i d = 0.5 a, p-ch 1.1 1.5 q gs gate-source charge v gs = 4.5 v n-ch 0.38 nc p- channel p-ch 0.32 q gd gate-drain charge v ds = -5 v, n-ch 0.45 nc i d = -0.25 a, v gs = -4.5 v p-ch 0.25 drain-source diode characteristics and maximum ratings i s maximum continuous drain-source diode forward current n-ch 0.3 a p-ch -0.5 v sd drain-source diode forward voltage v gs = 0 v, i s = 0 .5 a (note ) n-ch 0.83 1.2 v t j =12 5c 0.69 0.85 v gs = 0 v, i s = -0 .5 a (note ) p-ch -0.89 -1.2 t j =12 5c -0.75 -0.85 notes: 1. r q ja is the sum of the junction-to-case and case-to-ambient thermal resistance where thecase thermal reference is defined as the sol der mounting surface of the drain pins. r q jc is guaranteed by design while r q ca is determined by the user's board design. 2. pulse test: pulse width < 300 s, duty cycle < 2.0%. FDC6321C .revb b. 180 o c/w on a 0.005 in 2 of pad of 2oz copper. a . 140 o c/w on a 0.125 in 2 pad of 2oz copper.
FDC6321C .revb typical electrical characteristics: n-channel 0 0.5 1 1.5 2 0 0.3 0.6 0.9 1.2 1.5 v , drain-source voltage (v) i , drain-source current (a) 3.5 2.7 2.5 2.0 1.5 ds d v = 4.5v gs 3.0 r ds(on ) , normalized 0 0.2 0.4 0.6 0.8 1 1.2 0.5 1 1.5 2 i , drain current (a) drain-source on-resistance v = 2.0v gs 2.7 3.0 4.5 d 3.5 2.5 figure 1. on-region characteristics . figure 2. on-resistance variation with drain current and gate voltage . -50 -25 0 25 50 75 100 125 150 0.6 0.8 1 1.2 1.4 1.6 t , junction temperature (c) drain-source on-resistance j v = 4.5 v gs i =0.5 a d r , normalized ds(on) figure 3. on-resistance variation with temperature . 0 0.5 1 1.5 2 2.5 0 0.2 0.4 0.6 0.8 1 v , gate to source voltage (v) i , drain current (a) 25c 125c v = 5.0v ds gs d t = -55c j figure 5 . transfer characteristics. 0 0.2 0.4 0.6 0.8 1 1.2 0.0001 0.001 0.01 0.1 1 v , body diode forward voltage (v) i , reverse drain current (a) t = 125c j 25c -55c v = 0v gs sd s figure 6 . body diode forward voltage varia tion with source current and temperature. figure 4 . on resistance variation with gate-to -source voltage. 1 1.5 2 2.5 3 3.5 4 4.5 5 0 0.4 0.8 1.2 1.6 2 v , gate to source voltage (v) id= 0.5a gs r , on-resistance (ohm) ds(on) 125c 25c
FDC6321C .revb typical electrical characteristics: n-channel (continued) 0 0.4 0.8 1.2 1.6 2 0 1 2 3 4 5 q , gate charge (nc) v , gate-source voltage (v) g gs i = 0.5a d 10v 15v v = 5v ds figure 10 . single pulse maximum power dissipation. 0.1 0.5 1 2 5 10 25 5 10 20 50 100 150 v , drain to source voltage (v) capacitance (pf) ds c iss f = 1 mhz v = 0v gs c oss c rss figure 8. capacitance characteristics . figure 7 . gate charge characteristics. figure 9. maximum safe operating area. 0.01 0.1 1 10 100 300 0 1 2 3 4 5 single pulse time (sec) power (w) single pulse r =see note 1b t = 25c q ja a 0.1 0.2 0.5 1 2 5 10 20 40 0.01 0.03 0.1 0.3 1 5 v , drai n-source voltage (v) i , drain current (a) v = 4.5v single pulse r = see note 1b t = 25c gs q ja ds d dc 1s 10ms 100ms rds(on) limit a 1ms 100s
FDC6321C .revb typical electrical characteristics: p-channel 0 1 2 3 4 5 0 0.25 0.5 0.75 1 1.25 1.5 -v , drain-source voltage (v) -i , drain-source current (a) v = -4.5v gs ds d -2.7 -2.5 -2.0 -3.0 -1.5 -3.5 0 0.2 0.4 0.6 0.8 1 0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4 -i , drain current (a) drain-source on-resistance v = -2.0 v gs d r , normalized ds(on) -3.5 -4.5 -2.7 -2.5 -3.0 -4.0 figure 11. on-region characteristics . figure 12. on-resistance variation with drain current and gate voltage . -50 -25 0 25 50 75 100 125 150 0.6 0.8 1 1.2 1.4 1.6 t , junction temperature (c) drain-source on-resistance (ohms) j r , normalized ds(on) v = -4.5v gs i = -0.5a d figure 13. on-resistance variation with temperature . -3 -2.5 -2 -1.5 -1 -0.5 -1 -0.75 -0.5 -0.25 0 v , gate to source voltage (v) i , drain current (a) v = -5 v ds gs d t = -55c j 125c 25c figure 15 . transfer characteristics. 0 0.2 0.4 0.6 0.8 1 1.2 0.0001 0.001 0.01 0.1 0.5 -v , body diode forward voltage (v) -i , reverse drain current (a) t = 125c j 25c -55c v = 0v gs sd s figure 16 . body diode forward voltage varia tion with source current and temperature. figure 14 . on resistance variation with gate-to - source voltage. -5 -4.5 -4 -3.5 -3 -2.5 -2 -1.5 -1 0 1 2 3 4 5 v , gate to source voltage (v) id=-0.5a gs r , on-resistance (ohm) ds(on) 125c 25c
FDC6321C .revb typical electrical characteristics: p-channel (continued) figure 19 . maximum safe operating area. 0 0.3 0.6 0.9 1.2 1.5 1.8 0 1 2 3 4 5 q , gate charge (nc) -v , gate-source voltage (v) g gs i = -0.5a d -15v v = -5v ds -10v figure 17 . gate charge characteristics . figure 2 0 . single pulse maximum power dissipation. 0.1 0.3 0.5 1 5 10 15 25 5 10 20 50 100 150 -v , drain to source voltage (v) capacitance (pf) ds c iss f = 1 mhz v = 0 v gs c oss c rss figure 18 . capacitance characteristics . figure 2 1 . transient thermal response curve . note: thermal characterization performed using the conditions described in note 1b .transient thermal response will change depending on the circuit board design. 0.0001 0.001 0.01 0.1 1 10 100 300 0.01 0.02 0.05 0.1 0.2 0.5 1 t , time (sec) transient thermal resistance 1 single pulse d = 0.5 0.1 0.05 0.02 0.01 0.2 r(t), normalized effective duty cycle, d = t / t 1 2 r (t) = r(t) * r r = see note 1b q ja q ja q ja t - t = p * r (t) q ja a j p(pk) t 1 t 2 0.01 0.1 1 10 100 300 0 1 2 3 4 5 single pulse time (sec) power (w) single pulse r =see note 1b t = 25c q ja a 0.1 0.2 0.5 1 2 5 10 20 40 0.01 0.03 0.1 0.3 1 2 - v , drain-source voltage (v) -i , drain current (a) rds(on) limit d a dc ds 1s 100ms 10ms 1ms v = -4.5v single pulse r = see note 1b t = 25c q ja gs a
? 1998 fairchild semiconductor corporation ssot-6 unit orientation conductive embossed carrier tape f63tnr label customize label antistatic cover tape ssot-6 packaging configuration: figure 1.0 components leader tape 390mm minimum trailer tape 160mm minimum ssot-6 tape leader trailer configuration: figure 2.0 cover tape carrier pin 1 tape note/comments packaging option ssot-6 packaging information standard (no flow code) d87z packaging type reel size tnr 7?dia tnr 13 qty per reel/tube/bag 3,000 10,000 box dimension (mm) 184x187x47 343x343x64 max qty per box 9,000 20,000 weight per unit (gm) 0.0158 0.0158 weight per reel (kg) 0.1440 0.4700 184mm x 184mm x 47mm pizza box for standard option f63tnr label f63tnr label f63tnr label sample 343mm x 342mm x 64mm intermediate box for d87z option 631 631 631 631 lot: cbvk741b019 fsid: fdc633n d/c1: d9842 qty1: spec rev: qarv: spec: qty: 3000 d/c2: qty2: cpn: (f63tnr)2 f63tnr label supersot tm -6 tape and reel data and package dimensions december 1998, rev. b
p1 a0 d1 p0 f w e1 d0 e2 b0 tc wc k0 t dimensions are in inches and millimeters tape size reel option dim a dim b dim c dim d dim n dim w1 dim w2 dim w3 (lsl-usl) 8mm 7?dia 7.00 177.8 0.059 1.5 512 +0.020/-0.008 13 +0.5/-0.2 0.795 20.2 2.165 55 0.331 +0.059/-0.000 8.4 +1.5/0 0.567 14.4 0.311 ?0.429 7.9 ?10.9 8mm 13?dia 13.00 330 0.059 1.5 512 +0.020/-0.008 13 +0.5/-0.2 0.795 20.2 4.00 100 0.331 +0.059/-0.000 8.4 +1.5/0 0.567 14.4 0.311 ?0.429 7.9 ?10.9 see detail aa dim a max 13?diameter option 7 diameter option dim a max see detail aa w3 w2 max measured at hub w1 measured at hub dim n dim d min dim c b min detail aa notes: a0, b0, and k0 dimensions are determined with respect to the eia/jedec rs-481 rotational and lateral movement requirements (see sketches a, b, and c). 20 deg maximum component rotation 0.5mm maximum 0.5mm maximum sketch c (top view) component lateral movement typical component cavity center line 20 deg maximum typical component center line b0 a0 sketch b (top view) component rotation sketch a (side or front sectional view) component rotation user direction of feed ssot-6 embossed carrier tape configuration: figure 3.0 ssot-6 reel configuration: figure 4.0 dimensions are in millimeter pkg type a0 b0 w d0 d1 e1 e2 f p1 p0 k0 t wc tc ssot-6 (8mm) 3.23 +/-0.10 3.18 +/-0.10 8.0 +/-0.3 1.55 +/-0.05 1.00 +/-0.125 1.75 +/-0.10 6.25 min 3.50 +/-0.05 4.0 +/-0.1 4.0 +/-0.1 1.37 +/-0.10 0.255 +/-0.150 5.2 +/-0.3 0.06 +/-0.02 supersot tm -6 tape and reel data and package dimensions, continued december 1998, rev. b
? 1998 fairchild semiconductor corporation supersot ? -6 (fs pkg code 31, 33) 1 : 1 scale 1:1 on letter size paper dimensions shown below are in: inches [ m ill imeters ] part weight per unit (gram): 0.0158 supersot tm -6 tape and reel data and package dimensions, continued september 1998, rev. a
trademarks acex? coolfet? crossvo l t? e 2 cmos tm f act? f act quiet series? f ast ? f as t r? g t o? hisec? the following are registered and unregistered trademarks fairchild semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. life support policy f airchilds products are not authorized for use as critical components in life suppo r t devices or systems without the express written appro v al of f airchild semiconduc t or corpor a tion. as used herein: isoplanar? microwire? pop? power t rench? qs? quiet series? supersot?-3 supersot?-6 supersot?-8 t inylogic? 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the bod y , or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the use r . 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to a f fect its safety or e f fectiveness. product s t a tus definitions definition of t erms datasheet identification product status definition advance information preliminary no identification needed obsolete this datasheet contains the design specifications for product development. specifications may change in any manner without notice. this datasheet contains preliminary data, and supplementary data will be published at a later date. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains final specifications. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains specifications on a product that has been discontinued by fairchild semiconducto r . the datasheet is printed for reference information onl y . formative or in design first production full production not in production disclaimer fairchild semiconductor reserves the right to make changes without further notice t o any products herein to improve reliabilit y , function or design. fairchild does not assume any liability arising out of the applic a tion or use of any product or circuit described herein; neither does it convey any license under its pa tent rights, nor the rights of others.

▲Up To Search▲

Price & Availability of FDC6321C

	To Download FDC6321C Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .